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Writing a generic Makefile

Filed under How-to, Programming.

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Building custom make files for relatively small projects which result in just one executable is rather tedious. Luckily, Makefile itself provides us with a way to create one single Makefile that works for most cases.

The “trick” lies in two make macros, $<, $* and in wildcard matching. The first macro is simply the name of the file that was matched by the target rules and the second is the same file name but WITHOUT the extension. For simplicity, I define somewhere before the first target:

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INFILE = $<
OUTFILE = $*

You can use $(OUTFILE) to define the extension of the executable file. I’ve gotten in to the habit of using $(OUTFILE).x for the final executables. Tutorials around the interwebs will be geared towards larger projects and tell you to use meaningful target names specific to the application, and/or use one of the common “all”, “install”, “test”, “clean” labels. Here, I follow a different approach. First, I teach make how to compile a .c file, using:

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.c:
$(CC) $(INFILE) $(CFLAGS) $(GSL) -O3 -lm -o $(OUTFILE).x

Here the target is “.c” and will compile any foo.c file if you type:

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make -f /path/to/makefile foo

You can of course define several different targets of this type, but we an go further. The next step is to define some more interesting targets, like:

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%_dbg: %.c
$(CC) $(INFILE) $(GSL) $(CFLAGS) $(DEBUG) $(OUTFILE)_dbg.x

where % is a wildcard that matches one of more characters (similar to * in bash), so when you type:

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make -f /path/to/makefile bar_dbg

GNU make will interpret this as meaning, compile “bar.c” (since we listed %.c as a dependency) using these particular rules. The _dbg can be seen as a conditional compilation flag, since you can define different flags to compile the same file in several different ways. For instance, in my personal makefile I have defined _dbg, for compilation with debugging flags, _condor to link with condor_compile (more on that in later posts), _gl to link with OpenGL. You can use this example of a simple Makefile which works for both C and C++ source code with or without debugging flags as the starting point for your own.

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CC     = gcc
CPP    = g++
CFLAGS = -I. -I./include/ -I$(HOME)/progs/include/ -I/sw/include -L/sw/lib
GSL    = -lgsl -lgslcblas
DEBUG  = -lm -g -DBGDEBUG -o
INFILE = $<
OUTFILE = $*
 
.c:
      $(CC) $(INFILE) $(CFLAGS) $(GSL) -O4 -lm -o $(OUTFILE).x
 
.cpp:
      $(CPP) $(INFILE) $(CFLAGS) $(GSL) -O4 -lm -o $(OUTFILE).x
 
%_dbg: %.c
     $(CC) $(INFILE) $(GSL) $(CFLAGS) $(DEBUG) $(OUTFILE)_dbg.x
 
%_dbg: %.cpp
      $(CPP) $(INFILE) $(GSL) $(CFLAGS) $(DEBUG) $(OUTFILE)_dbg.x
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3 Responses to “Writing a generic Makefile”

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  1. Simon Says:

    The INFILE line ist displayed wrong with my browser. It shows the HTML code for the less than sign:
    INFILE = $<
    should be: INFILE = $

  2. Simon Says:

    arg. I should have seen this comming. Now the “wrong line” is correct and the post ends at the “right line”. In short if the makefile does wierd things replace the part at the right side of INFILE with the “dollar sign” followed by the “less than” sign.

    I also had to add TABS before line 10, 13, 16 and 19.

  3. bgoncalves Says:

    Thanks Simon. It seems the online editor didn’t like Makefile’s notation.
    I’ve made the appropriate corrections.

    Bruno

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